A non-volatile latch (NVL) is a type of semiconductor memory that uses bistable, cross-coupled floating gate or silicon-oxide-nitride-oxide-silicon (SONOS) memory transistors provided to store each bit of data. Typically, NVL cells are very large, exceeding about 100 μm2 using current semiconductor technology, and require high-voltages and complicated signals to power-up correctly. In addition, the architecture of a conventional NVL cell can provide indeterminate data on first power up, and the memory transistors are prone to the well-known read-disturb phenomenon by which repeated read operations can degrade the stored data.
Thus, there is a need for a non-volatile latch which overcomes the shortcomings of the conventional NVL cell architecture.